Abstract:
A combat error control in wireless networks, this proposed protocol is an extension of the Aggressive Packet Combining scheme (APC). We will be discussing packets with a ...Show MoreMetadata
Abstract:
A combat error control in wireless networks, this proposed protocol is an extension of the Aggressive Packet Combining scheme (APC). We will be discussing packets with a set payload size in this paper. We have Packet Combining (PC) and Modified Packet Combining (MPC) blocks here, which fulfil their functions as expected. Instead of brute-forcing through all conceivable permutations in the APC block, we’ll keep a lightweight database of recent 1000 transmissions, identify the bit location where the error occurred, and update it accordingly. In this work, it is assumed that bit error occurs frequently in the data stream of the same medium at a specific index and outperforms the conventional APC and PC techniques. The simulation results are shown that the performance of proposed work in terms of packet throughput, packet error correction probability, and energy consumption probability using MA TLAB.
Published in: 2022 2nd International Conference on Artificial Intelligence and Signal Processing (AISP)
Date of Conference: 12-14 February 2022
Date Added to IEEE Xplore: 25 April 2022
ISBN Information: