From Wafer Bifurcation to Warpage Die: a Correlation Method to determine the Warpage of a Metal-Coated Silicon Substrate

Achieving a deeper comprehension and control on the evolution of warpage from wafer scale to die level can be a benefit within the semiconductor industry. In this work we compare the warpage measured in the use-case of a thin 8" wafer Si (001), metalized with a 4.5 µm Al thin layer, with that one measured in the 9mmx12mm die obtained from the wafer. It results from measurements that the wafer bifurcates, whereas the die does not show a high warpage value. The bifurcation behavior of the wafer and its warpage has been simulated by means of the ANSYS mechanical solver. By exploiting similar conditions in the simulations, the warpage in the die has been also investigated. It is shown how the conservation of the stress can be transferred from the wafer case to the die case and it justifies the presence of a bifurcation at the wafer scale and its absence at the die level. The range of validity of this assert depends also on the die thickness. These results can be extended to other substrates, such as silicon carbide (SiC).