EMC related Handle-Wafer Backside Effects in a 180nm SOI-Technology

During EMC measurements of a CAN (Controller Area Network) transceiver integrated circuit (IC) it was found that the bandgap circuit showed a significant voltage drop for low frequencies in a range of 1 MHz to 20 MHz. Standard methods to investigate or simulate direct power injection on the supply pins of the bandgap circuit failed and did not show the expected dip of the bandgap voltage mean value. A detailed investigation was started to find the root cause of the effect. It turned out that the bandgap was influenced by capacitive coupling from the handle wafer underneath the buried oxide of the IC. The methodology to find such a handle wafer effect of 180nm SOI technology is described in this paper.