Ultralow Power E-Band Low-Noise Amplifier With Three-Stacked Current-Sharing Amplification Stages in 28-nm CMOS

This letter presents a differential ultralow power low-noise amplifier (LNA) with stacked three-stage common-source (CS) amplification cells. A three-coil transformer is developed to boost each stage’s $g_{m}$ and reuse current, which renders high gain, low noise, and low power consumption. The proposed LNA has been implemented in a 28-nm CMOS process and achieves a peak gain of 13.48 dB and a minimum noise figure (NF $_{\mathrm {min}}$ ) of 4.56 dB. The measured 3-dB gain bandwidth ( ${\text {BW}}_{3\,\text {dB}}$ ) is from 69.6 to 76.2 GHz. The LNA consumes 3.64-mW power from a 1.4-V supply and occupies 0.088-mm² area excluding pads.