A Fully-Integrated Ka-Band CMOS Rectifier Using Large Signal Analysis for Wireless Power Transfer

In this study, we propose a design methodology for a complementary metal–oxide semiconductor (CMOS)
Ka
-band three-stage rectifier. To maximize the rectification efficiency of the rectifier under high input power, we conduct a large-signal analysis to determine the
$S$
-parameters, equivalent capacitance, and equivalent resistance of each stage. To verify the feasibility of the proposed design methodology, we designed a
Ka
-band three-stage rectifier using a 65-nm radio frequency CMOS (RF-CMOS) process (one poly and nine metal layers). Within an input power range of 0–12 dBm, the measured maximum efficiency is 15.3%, while the measured output dc voltage is 4.63 V.