Abstract:
This paper presents a gate driver for a GaN-based half-bridge structure operating in a buck converter with input voltage >40 V or a boost converter with output voltage >3...Show MoreMetadata
Abstract:
This paper presents a gate driver for a GaN-based half-bridge structure operating in a buck converter with input voltage >40 V or a boost converter with output voltage >30 V. Two 500 pF on-chip capacitors are utilized to construct three-level gate drivers, providing a near- V_{{\text {DD}}} negative voltage for gate of the rectifier switch to eliminate the induced pulse on the gate from the high dv / dt slew rate of V_{\text {X}} when the main switch is turned on. The dead time controller tunes the delay of the gate signal of the rectifier switch by sensing the slope of V_{\text {X}} , thus the near-optimal zero-voltage switching can be achieved with deviation < 3 ns. The GaN driver is implemented with a 0.18- \mu \text{m} BCD process. The efficiencies can be improved by 8.33% and 6.87% at light load in a buck and a boost converter due to the dead-time control. The peak efficiencies of 20 V–12 V and 12 V–18 V conversions are 86.37% and 84.39%, respectively.
Published in: IEEE Transactions on Circuits and Systems I: Regular Papers ( Volume: 69, Issue: 5, May 2022)