An Area-Efficient FPGA Implementation of a Real-Time Multi-Class Classifier for Binary Images

Developing image classification modules in embedded systems is a complex task due to the limited resources available. In this brief, a multi-class image classifier using HOG feature extractor and SVM classifier is proposed for binary images. The novelty of the proposed system is applying two steps of binarization to the HOG technique to improve processing speed and area efficiency. First, HOG features are extracted from binary images to simplify the feature extraction process. Second, block normalization of the HOG is replaced with binarization to reduce hardware resource utilization. Compared to a similar existing work, our system speeds up the classification process while utilizing fewer hardware resources, with an 11.4% higher classification accuracy using the same setting.