Copper Foil Characterization for High Performance Stack-up Design

In recent 5G era, the development of artificial intelligence (AI) technology has brought the technology to move faster, and the increasing data speed of high-speed (HS) input/output (I/O) interfaces lead to a challenging design for high routing density and stack-up. For instance, PCI Express Gen5 is performing at 32 Gbps while it requires a small loss budget at 16 GHz. In today's server product system design, in order to meet the high performance, the layer count cannot be reduced and the overall thickness is about the same. Thinner dielectric thickness is another consideration to create extra layers for higher and better performance. However, it will lead to more conductor loss, especially at higher frequencies. In this paper, the focus was on the material selection and proper copper foil usage in the stack-up. We found the importance of copper foil type, which should be applied not only on the signal but also the reference ground layers. The simulation along with fundamental theories were applied to support the results.