Design of Miniaturized UWB Low Noise Amplifier Based on 65nm CMOS Technology

An X-band CMOS low noise amplifier (LNA) with flat gain and noise Figure (NF) is proposed in this paper. To achieve sufficient gain, the LNA adopts two-stage topology. A feed-back transformer is used at the input terminal to implement noise and wideband input matching. Transformer-based inter-stage and output matching networks are adopted to achieve well isolation and compact size. By introducing inductive peaking technique, the proposed LNA obtain lower NF and extend the bandwidth. Post simulation results show that the LNA achieves a gain of 14.6± 2dB and NF of 2. 5-3.3dB across a bandwidth from 8.5 GHz to 12.5 GHz. With the supply voltage of 1 V at the first stage and 1.8 V at the second stage, the dc power dissipation is 20.8 mW. The simulated input 1dB compression point ($\mathrm{P}_{\mathrm{l}\mathrm{d}\mathrm{B}}$) is -27.3dBm. The core chip area is only 0.41× 0.87mm
²
.