Low-power rail-to-rail CMOS linear transconductor

The linearity of MOS transconductors is only moderate (around 30 to 50dB) because they rely on the square-law model, which is not very accurate (particularly in short-channel processes). In addition, only the difference in output currents is ideally linear, whereas individual currents have significant second order harmonics. The circuit linearity is affected by the second-order effects such as the short-channel effect and the mobility degradation. We present a low-power rail-to-rail CMOS transconductor. In order to obtain an improved linearity of the CMOS transconductor, a cross connection symmetrical stage is used and a wide range is achieved by using two complementary transconductors in parallel.