Commodity Bit-Cell Sponsored MRAM Interaction Design for Binary Neural Network

Binary neural networks (BNNs) can transform multiply-and-accumulate (MAC) operations into XNOR and accumulation (XAC), which has been proven to greatly reduce the hardware resource consumption and improve the computing speed with small accuracy loss. Among various emerging nonvolatile memories (NVMs), spin transfer torque magnetic random access memory (STT-MRAM) shows great prospect for in-memory computing framework. In this work, a device-circuit interaction design approach is investigated with commodity MRAM bit-cell. The bit-cell array (BCA) and related peripheral circuits are minimally modified to realize in-magnetic random access memory (MRAM) one-step and unlimited-width convolution operations. The in-memory computing framework is implemented with 16-nm FinFET process and magnetic tunnel junction (MTJ) compact model. Mixed National Institute of Standards and Technology database (MNIST) handwritten digit recognition is demonstrated using this in-memory computing proposal. The recognition latency of one-step convolution is 21% improved than that of XAC convolution, whereas energy consumption of XAC is 30% lower than the one-step operations. The recognition accuracy of one-step/XAC convolution achieves 93.3%/96.5%, respectively.