LOMI: Logic Gate Multiplexer Integrated Circuit using Verilog HDL

A Universal Logic Gate (ULG) Integrated Circuit, either NAND or NOR, can only implement 2 out of the 3 basic gates. To implement the 3 basic logic gates, 2 ULG ICs are needed. The study was conducted to simulate a Logic Gates Multiplexer Integrated Circuit (LOMI) where AND, OR, and NOT logic can be selected to design a combinational circuit and to determine its effect in terms of propagation delay. LOMI operates on mode where all gates can be INVERTed(00), or ANDed (01), or ORed(10), or all basic gates are present (11). Modelsim was used to simulate the proposed LOMI to produce the expected output based on its mode of operation, to construct combinational circuits using basic logic gates and the proposed IC, and to measure propagation delays estimation on both circuit implementation. Two-sample statistical treatment is used and found that there is no statistically significant difference between the propagation delays of the proposed IC and the basic logic gates implementation of combinational circuits tested.