Implementation of IRIG-B Time codes on ZYNQ SoC Platform

Inter Range Instrumentation Group (IRIG) time protocol is widely used to ensure precise time synchronization. This paper explains the implementation schemes of an IRIG-B DC(Direct Current) Level Shifted (DCLS) and IRIG-B Amplitude Modulated (AM) encoders and decoders on ZYNQ Silicon on Chip (SoC) based platform. The ARM -processing system of the SoC receives the NMEA data from a standard Global Navigation Satellite System (GNSS) chip and extracts the time information. The extracted time information is converted into a 32 bit word and sent to Field Programmable Gate Array(FPGA) portion of the SoC. A software encoder module in the FPGA will convert the time data into standard IRIG B DCLS formats. A decoder module developed in the FPGA can read the IRIG-B DCLS data and can decode to standard binary format of current time value. The DCLS data and a Digital Data Synthesizer (DDS) module in FPGA are used for IRIG-B-AM encoder implementation where the digital to analog conversion is achieved through a standard 12 bit Digital to Analog Converter (DAC) circuit. An Analog to Digital Converter (ADC) circuit and a software module inside FPGA is implemented to verify the functionality of an IRIG-B AM decoder.