Implementation and Performance Improvement of POSIT Multiplier for Advance DSP Applications

A digital multiplier is an electronic circuit used in digital electronics, such as a computer, to multiply two binary numbers. A variety of computer arithmetic techniques can be used to implement a digital multiplier. This continuous improvement of the state of the art has been accompanied by an increase in computational complexity and an overhead in hardware resources. Posit number system has been used as an alternative to IEEE floating-point number system in many applications. The latency and speed is important parameter in digital multiplier. This paper shows the 64 bit posit multiplier implementation and performance improvement. Xilinx 14.7 is used to implementation with verilog programming language.