Atomically Thin Indium-Tin-Oxide Transistors Enabled by Atomic Layer Deposition

In this work, indium-tin-oxide (ITO) transistors with atomically thin channel thickness (
${T}_{ch}$
) of 2.1 nm realized by atomic layer deposition (ALD) are demonstrated. A maximum ON-state current of 970 mA/mm at
${V}_{DS}$
of 0.8 V and an ON/OFF ratio up to 10
⁷
are achieved in ITO transistor with In:Sn ratio of 9:1, channel length (
${L}_{ch}$
) of 60 nm, and dielectric equivalent oxide thickness (EOT) of 2.1 nm. Comparison between devices with different In:Sn ratios indicates a significant reduction of electron transport resulting from more Sn concentrations in ITO. The impact of back-end-of-line (BEOL) compatible low-temperature annealing is also investigated. An enhancement-mode operation with minimum subthreshold slope (SS) of 80 mV/dec and maximum field-effect mobility (
$\mu _{FE}$
) of 28 cm
²
/
$\text{V}\cdot \text{s}$
is achieved after O
₂
annealing. Besides, bias instability measurement shows the negative threshold voltage (
${V}_{T}$
) shift under both positive and negative gate bias stress due to donor-like interface states below the trap neutral level (TNL). The realization of large-area synthesis of atomically thin ITO films by ALD and decent electrical performance provide opportunities in future monolithic 3-D device integration with BEOL compatibility.