Clock compression for SAR ADC array with Gaussian input vector

Reduction of comparison cycles (clock compression) leads to power savings of a successive-approximation-register (SAR) analog-to-digital converter (ADC). In [10]. the upper bound of SAR ADC clock compression ratio was established, and the general Maximum Entropy Reduction (MER) algorithm that approaches this bound was proposed. However, for the ADC array, the direct use of the MER algorithm is questionable since its computational complexity grows exponentially with the size of the array. The fundamental possibility of sub-optimal and less general (application specific) versions of MER with reasonable complexity was predicted in [10]. This paper presents examples of such algorithms when input vector follows a multi-dimensional Gaussian distribution. Simulation results show the performance of the proposed algorithm applied to a MIMO receiver.