A Selective Soft Error Protection Method for COTS Processor-based Systems

This paper proposes a framework that dynamically monitors a program's registers and analyzes their interaction with the memory at run-time. This information is used to implement the Selective-Swift-R fault tolerance technique, which enables us to selectively identify and protect vulnerable registers and achieve fault tolerance against soft errors. Being a pure software-implemented framework and error detection techniques, this research is suitable for commercial off-the-shelf processors. The evaluation based on number of Silent Data Corruptions and code size overhead has been evaluated for four different case studies compared to the unprotected program.