Linker Energy Optimizations in Microcontrollers Using the GCC Toolchain: A Case Study

The following paper discusses in detail the remapping of executable code from Flash to SRAM in order to achieve an energy efficient firmware in microcontrollers. The used architecture is ARM Cortex-M4F and therefore the conclusions made here are applicable to other Harvard machines as well. A selected set of five benchmarks from the BEEBS package have been evaluated before and after the code relocation. Some of the optimizations are successful, others are not, but all the projects exhibited a lower power consumption than that of the original programs. This may serve as a guide to compiler architects that wish to implement energy optimization rules, which currently do not exist in the GCC toolchain.