Current Sharing of Parallel SiC MOSFETs under Short Circuit Conditions

Device-to-device parametric variations (e.g. threshold voltage V
TH
, gate resistance R
G
and junction temperature T
J
) can cause variations in the short-circuit currents conducted through parallel-connected devices. In this paper, the impact of variations in V
TH
, R
G
and T
J
on current sharing under short-circuits is investigated using measurements and electrothermal modelling. The results show that V
TH
is the most critical parameter affecting short-circuit current sharing and directly impacts the peak short circuit current. Variations in gate resistance do not impact the short circuit current sharing unless the variation is over 400% thereby indicating catastrophic failure of the gate wirebond. Variation in the initial junction temperature is also not as critical as variations in V
TH
since the higher temperature device takes less short circuit current. Electrothermal simulations of parallel connected SiC MOSFETs have been developed to analyze how V
TH
mismatch impacts short circuit current sharing. These simulations allow for the investigation of the impact of V
TH
mismatch on the electrothermal stresses of the parallel connected MOSFETs.