Novel DPWM Modulation Scheme for Three-Phase ZVS Inverters

Most inverters driving electrical machines or for grid applications operate under hard switching conditions at fixed frequency. However, the resulting high switching losses from the hard switched operation limit the efficiency. Another approach uses triangular current mode to achieve zero voltage switching of the semiconductors, thus avoiding switching losses. Disadvantageously, this modulation scheme exhibits a huge current ripple especially during the extrema of the sine. To remedy this drawback, this paper studies a discontinuous pulse width modulation scheme by simulation, which avoids switching actions around the sinusoidal maximum and thus, reduces the overall current ripple. In order to be able to use this approach beneficially, the transitions to the intervals with no switching actions should be soft. This attenuates oscillations within the filter and thus provides the intended reduction in rms inductor current. Besides a lower rms current predicted by simulation, also significantly reduced losses of the inductor are to be expected.