Superconducting Shuttle-flux Shift Buffer for Race Logic

This paper presents a superconducting magnetically coupled shift buffer based on a shuttle-flux shift register that stores single flux quantum (SFQ) pulses. The shift register has a DC bias operating margin of ±34% at 10 GHz, the power dissipation of 3.6µW at the clock bias, and 38% fewer Josephson junctions for 1024 stages compared to DFF-based shift registers. Clock bias is independent of the input pulse sequence through inductive coupling with a minimal current drive. Based on our shift register, we add two non-destructive readouts (NDRO) cells to construct a buffer that can inexpensively store the temporal information of race logic (RL) pulses or a pulse train for spiking neural networks. These applications motivate deep shift registers with many shifting intervals, which our shift register can implement with only a pair of coupled inductors and one JJ per shifting interval.