Machine Learning for VLSI CAD: A Case Study in On-Chip Power Grid Design

With the improvement of VLSI technology, on-chip power grid design is becoming more challenging than before. In this design phase of VLSI CAD, power grids are generated in order to make power and ground connections to transistors or logic blocks. However, due to the scaling of supply voltage and increase in the number of transistors per unit area of the chip, power grid design has become a considerable challenge. The two major issues encountered during power transfer via power grid are IR drop and Electromigration (EM). For a large chip, designers have to perform many iterations of a design in order to minimize IR drop and EM violations, which increases design cycle time. Recently, machine learning (ML) techniques have attracted the VLSI CAD community and are found to be very effective in solving VLSI CAD problems. However, very few works attempted to solve on-chip power grid design problem using machine learning. Therefore, this paper reviews some of the on-chip power grid design solutions using AI/ML approaches.