FPGA Implementation of Iris Recognition Based on Fast DCT Coding

Iris is a touch-less automated real-time biometric system for user authentication. Most iris recognition approaches suffer from high cost, long development times, power consumption, and computationally intensive. Extracting valuable features from iris is computational burden, computational time, and limited memory storage. Classification of irises is most time consuming phase, repeated in recognition. In addition, general purpose systems are low speed and not portable solution. In this paper, off-line iris approach implemented on PC and hardware. Both Fast Discrete Cosine Transform (FDCT)-based feature extraction and Hamming Distance for matching stages are synthesized and implemented using low-cost Xilinx Spartan-3E FPGA chip. Simulation and implementation results indicate that the proposed solution improved the execution time with equivalent accuracy and error rates achieved by computer solution. Iris recognition based on FDCT system is more reliable, more saving in computations cost, small size, and good interclass separation in minimum time.