Digital-to-Analog Converter Configuration Based on Non-uniform Current Division Resistive-Ladder

This paper presents design and analysis of DACs based on the non-uniform current division resistive ladder, and proposes a new configuration DAC with segmentation of binary, quaternary and unary resistive-ladders, which enables two times gain with equivalent chip area and current sources to the conventional. Also, Monte Carlo simulation considering resistor and current source mismatches shows that the DNL deviation of the proposed one is a little better than the conventional one.