Simple high-performance thermal management of chip-scale GaN FETs

Wide bandgap (WBG) power semiconductors are being adopted into mainstream designs due to order-of-magnitude improvements in electrical figures-of-merit (FOMs). The huge FOM improvements require revisiting many design assumptions, including thermal management. The latter has been raised as a difficult challenge due to increased power density, especially with chip-scale-packaging (CSP). This paper shows that CSP GaN power FETs have excellent thermal performance when mounted on standard printed circuit boards (PCBs) with simple methods for attaching heat sinks. It is shown that a CSP GaN FET with 4 mm² footprint on a standard 4-layer PCB can achieve junction-to-heatsink thermal resistance values of 6.2 K/W with < 70 μl of low-cost, medium performance thermal paste, and 5 K/W with the same amount of high-performance thermal putty, while maintaining electrical isolation. Analysis, FEM simulation, and experimental verification are provided. Pathways to further improvement are discussed.