A Pragmatic Quaternary FPGA Implemented with Floating Gate Memories

Consumer demands are outgrowing the benefits of technology scaling, especially for binary circuits. Previous studies proposed multi-valued logic (MVL) architectures, but these architectures use non-standard fabrication techniques and optimistic performance analysis. This study presents a new quaternary FPGA (QFPGA) architecture based on floating-gate memories which can be manufactured through standard CMOS fabrication. When simulated with open-source FinFET SPICE models, artifacts suggest competitive delay and power performance compared to equivalent binary circuits and other QFPGA architectures, and projection onto benchmark circuits predict additional performance improvements of up to 55% less area and one-third power reduction.