Low Power High Performance 4 bit Vedic-multiplier in 32nm

The performance of the system basically works better if the performance of the multiplier is good. In today's digital time, Multiplier is one which consumes power at the same time speed of multiplier is playing very important aspects in this. Multiplier Optimization for power and delay both will play an important role. Adders such as Ripple carry adder and carry look-ahead adder and carry skip adder are also having a role in the selection of adder units in the multiplier. In this paper, transmission gate and CMOS techniques are compared with bulk devices with different adders. Variation of 20% decrease from the operating voltage the average power, power delay product, energy-delay product decreases 76.33%,48.13% and 13.69% respectively for TG based CLA adder. Temperature increases from 25 °C to 50 °C, the average power, power delay product, energy delay product increases 41.42%, 65.33 % and 93.28% respectively for TG based CLA adder. Process variation from -2% to +2% to its mean value of 32nm, average power, power delay product and energy delay product decrease 68.40%, 105.86% and 85.35% for TG based CLA adder.