Enhanced Reliability of Fully Differential Difference Amplifier Through On-chip Digital Calibration

This paper presents a novel on-chip digital method of calibration for a fully differential difference amplifier (FDDA), which is aimed at improved performance and reliability through enhanced robustness against variations of process parameters, voltage, temperature, and ageing drift. The proposed method was designed and verified within 130 nm CMOS technology design kit in Cadence environment. Calibration hardware is built-in with the calibrated FDDA, and the whole integrated system is able to operate with only 0.4 V power supply. The effectiveness of the proposed calibration method was examined mainly by evaluation of the FDDA input offset voltage using Monte Carlo, process corners and ageing analyses performed for the temperature range from -20° C to 85° C. The work established metrics for comparison of different calibration methods (i.e. digital calibration, chopper stabilization, analog calibration and autozero), which significantly differ in fundamentals of their operation. The proposed digital calibration outperforms its alternatives, while the precision of calibration, area and power consumption overhead are considered. The less advanced topology of digital calibration was previously implemented for variable-gain amplifier with considerable success (residual offset of the calibrated amplifier reaches fair levels of 13 μV to 167 μV). The concept proposed in this work utilizes advanced high precision calibration algorithm.