Analytical Model to Study Turn-OFF Soft Switching Dynamics of SiC MOSFET in a Half-Bridge Configuration

Switching transients of SiC MOSFET are fast compared to its Si counterpart. Fast switching transient reduces switching loss but may induce prolonged oscillations, spurious turn-on, high device stress, and electromagnetic interference (EMI)-related issues, etc. In soft switched converters, use of external drain source capacitance can reduce these adverse effects along with the reduction in switching loss. However, the selection of external drain source capacitance is not straightforward. A large external capacitance reduces switching loss, (dv/dt), (di/dt), and transient over-voltage but may also result in higher dead-time loss and reduced switching frequency. This article presents an analytical model that captures the soft turn-off switching dynamics of SiC MOSFET using parameters obtained from device datasheet along with the values of external circuit parasitics. Unlike linear approximation, a nonlinear channel current model is used along with a comprehensive model of transfer capacitance. The effect of external gate drain capacitance is also considered. This leads to a better estimation of switching transition time, actual loss, (dv/dt), (di/dt), and transient over voltage. Also, a method to select an optimal value of external drain source capacitance is presented. The proposed model is validated through behavioral simulation and experiment for two 1.2-kV discrete SiC MOSFETs.