Rapid Resolution of Parametric Failures in the Process Development Period by Integrating Device Physics and Big Data

This paper describes a method for rapid resolution of parametric failure during the development period. Since the number of samples is small, it is not possible to carry out general big data analysis of white defect failures of CMOS image sensors (CISs) during the development period in the same way as can be done during the mass production period. Our feature value analysis of white defects based on device physics revealed that both a development product and mass products using big data show similar fluctuations in dark current spectroscopy and in-plane distribution in the wafer. Process step/tool identification and tool sensor data analysis revealed the degree of vacuum within the implantation tool to have a strong correlation with white defect count. We developed a virtual metrology (VM) model for white defect count and varied the degree of vacuum. As a result of our experiments, we were able to reduce white defect count during the development period by 75%. The time required for resolution of failures was 10% that of the conventional method. This paper describes a detailed explanation of how the potential causative process step/tool was identified in addition to the conference paper presented in ISSM2020.