Design and Analysis of QCA based Area Efficient 4×8 SRAM Array

Static Random-Access Memories (SRAM) is the popular choice for memory. As the memory requirement increases, so does the power consumption. Quantum-dot Cellular Automata (QCA) is the technology for low energy, compact and faster digital circuits. The paper aims to design, implementation and performance analysis of compact 4×8 bit SRAM array. First, basic gates are realized in QCA and then one-bit memory cell is constructed. The optimized 4×8 bit SRAM is realized and simulated using QCADesigner with QCA cells of 18nm cell width and height. The proposed QCA memory cell has a cell count of 41 QCA cells; this is very less compared to QCA memory cells in literature. The proposed 4×8 bit SRAM array has a total QCA cell count of 3823, with one clock cycle delay for read/write operation, occupies area of 4.1 μm² and energy dissipation is 1.32 eV, as measured using QCA Designer-E.