A Simple Estimation Technique for Timing Skew Mismatch in Time-Interleaved Analog-to-Digital Converter Systems

Timing skew mismatch in time-interleaved analog-to-digital converters (TIADCs) greatly degrade the dynamic performance of the TIADC, which can be improved effectively by digital estimation and correction techniques. In this paper, a simple and efficient timing skew estimation technique for M- channel time-interleaved analogue-to-digital converters is proposed. Based on digital mixing and inverse trigonometric calculation, timing skew mismatch can be extracted at one time by injecting a known test sinusoidal signal. Compared with the previous foreground techniques, the proposed technique has a higher computational efficiency and looser limitations. Simulation results show that, for a four-channel 12-bit TIADC model, with f_in/f_s=0.41, signal to noise and distortion ratio (SNDR) and spurious free dynamic range (SFDR) are improved from 24.1dB and 27.4dB to 74.0dB and 106.8dB, respectively.