Execution Array Memory Array Processor (XarMa)

An Execution Array Memory Array (XarMa) processor is described for signal processing and internet of things (IoT) applications, (pronounced sharma, that means happiness in Sanskrit). The XarMa processor uses a new 1 to K+1 adjacency network in an array of execution units. The 1 to K+1 adjacency refers to connections separately made in rows and in columns of execution unit and local file nodes, where the number of Rows≥K>1 and of Columns≥K>1 and K is an odd integer. Instead of a large central multi-ported register file, distributed storage files placed local to each execution unit is used. A new instruction set architecture is used having instructions that specify forwarding of execution results to execution units associated with destination instructions. The forwarding of execution results directly to execution units reduces storage of temporary variables for low power. This execution array is scalable to support cost effective and low power high-performance processing focused on target product requirements. A neural example is also presented.