Survey of Deep Learning Neural Networks Implementation on FPGAs

Deep learning has recently indicated that FPGAs (Field-Programmable Gate Arrays) play a significant role in accelerating DLNNs (Deep Learning Neural Networks). The initial specification of DLNN is usually done using a high-level language such as python, followed by a manual transformation to HDL (Hardware Description Language) for synthesis using a vendor tool. This transformation is tedious and needs HDL expertise, which limits the relevance of FPGAs. This paper presents an updated survey of the existing frameworks for mapping DLNNs onto FPGAs, comparing their characteristics, architectural choices, and achieved performance. Besides, we provide a comprehensive evaluation of different tools and their effectiveness for mapping DLNNs onto FPGAs. Finally, we present the future works.