An FPGA Implementation of a Gaussian Process Based Predictor for Sequential Time Series Data

Gaussian Process Regression (GPR) is one of popular supervised learning techniques that map input data sequence into the continuous outputs with Gaussian probability distribution. Since GPR can quantify uncertainty in the predicted values unlike other machine learning techniques, it is becoming used to predict behaviors of mission critical applications such as satellites or gas turbines. However, its computation requirement is very high due to the extensive use of matrix operations. In this paper, we focus on the mean value prediction part as a major time-consuming one of Gaussian process regression and attempt to implement a custom hardware accelerator on FPGAs using high-level synthesis technique. Assuming the target dataset is onedimensional time series data, we design the accelerator specific to the single feature. Following the reference design using Python’s scikit-learn, we prepare a straightforward implementation in C++, and optimize it for an FPGA with high-level synthesis technique. From the results of implementation on the Ultra96 MPSoC board, we find that our accelerator can achieve a 250x speedup and 177 times less energy compared with the reference Python code for the CPU on the target board.