MOS devices with high quality ultra thin CVD ZrO/sub 2/ gate dielectrics and self-aligned TaN and TaN/poly-Si gate electrodes

In this paper, we have successfully fabricated and characterized self-aligned TaN and TaN/poly-Si gated n-MOSFETs with ultra thin (EOT=11 /spl Aring/) CVD ZrO/sub 2/ gate dielectrics. It is show that while both gate stacks show excellent leakage current and good thermal stability after a 900/spl deg/C, 30 s, N/sub 2/ anneal, the TaN/poly-Si ZrO/sub 2/ devices exhibit superior thermal stability even after 1000/spl deg/C, 30 s, N/sub 2/ anneal. In addition, the TaN/poly-Si devices show negligible frequency dependence of CV, charge trapping, and superior TDDB characteristics, compared to TaN devices. Well-behaved N-MOSFETs with both TaN and TaN/poly-Si gate electrodes are demonstrated.