High Performance Application-oriented Memory Management on Multicore Systems

Due to the evolution of imagining and dealing with issues and demands that have developed with intelligent systems, higher performance has become a crucial need for daily growth of application size and complexities. Currently, most high-performance computing systems are multi-core, and many kinds of research have been done toward minimizing the execution time efficiently. Cache performance impacts on program execution especially on modern intelligent processing systems, therefore cache replacement policies in set-associative caches have been investigated in great depth. We propose an approach to consider information derived from coherence state of the cache block in a time-interleaved manner, and our simulations on high-performance applications of PARSEC2.1 and SPLASH-2 benchmark suits show that our approach has 10% lower miss rate and up to 10% more instructions per cycle than LRU, MRU and Random replacement policy without further power consumption.