Proposal for a field-evolvable hardware based on a microprocessor incorporated flash memory

A new idea for evolvable hardware based on a microprocessor is proposed. Evolvable hardware is a new direction in hardware research that fuses evolutionary computation and reconfigurable logic LSI circuits. In recent years, there has been much research using programmable logic devices (PLDs) and field programmable gate arrays (FPGAs). In particular, the application of digital circuit evolution to engineering fields has already begun. On the other hand, the long learning time, the difficulty of predicting when an effective capability will appear, the large chip size and other such problems have hindered progress in diffusion into engineering fields. We propose RTL (register transfer level) evolution performed on a microprocessor as a means of addressing these problems, Specifically, we propose: (1) incorporating flash memory into the microprocessor to allow on-board programming and reprogramming, (2) using genetic algorithms to provide an RTL learning capability, and (3) the use of a framework that provides for the coexistence of static programs and programs that self-organize through learning. On the basis of a simple hand-design, we concluded that the proposed method is more effective in terms of learning efficiency and reliability than the conventional approach using FPGAs and PLDs.