Analysis of TSV-Induced Mechanical Stress and Electrical Noise Coupling in Sub 5-nm Node Nanosheet FETs for Heterogeneous 3D-ICs

Through-silicon via (TSV)-induced mechanical stress and electrical noise coupling effects on sub 5-nm node nanosheet field-effect transistors (NSFETs) were investigated comprehensively compared to fin-shaped FETs (FinFETs) using TCAD for heterogeneous 3D-ICs. TSV-induced channel length directional stress (S
_ZZ
) predominantly causes variations of on-state current (ΔI
_on
). NSFETs exhibit the greater ΔI
_on
than FinFETs because electron velocities and densities in channels vary with respect to SZZ in the same directions for NSFETs but do the opposite for FinFETs. Nevertheless, TSV-induced mechanical stress is negligible when TSV is farther than keep-out zone. Meanwhile, TSV signals can be coupled to operating devices through substrate and induce capacitive and back-bias noise coupling currents (I
_cap
, I
_b-b
). NSFETs exhibit the greater |I
_cap
|/I
_on
than FinFETs because its wider source/drain (S/D) epitaxies form larger depletion capacitances between drain and punch-through stopper (PTS). On the other hand, the |I
_b-b
|/I
_on
is smaller for NSFETs because its parasitic bottom transistor alleviates back-bias-induced potential barrier lowering. Furthermore, wide diameter of Cu of TSV increases |I
_b-b
|/I
_on
only, but short rise time of TSV signals increases both |I
_cap
|/I
_on
and |I
_b-b
|/I
_on
. Unfortunately, conventional devices cannot satisfy criterion for analog applications (|I
_cap
, I
_b-b
|/I
_on
<; 0.5%); therefore, a new strategy inserting bottom oxide (BOX) beneath the S/D with undoped PTS is suggested. The |I
_cap
|/I
_on
for NSFETs decreases by undoped PTS, but not for FinFETs due to a remnant depletion capacitance between fin and PTS. The |I
_b-b
|/I
_on
for NSFETs decreases remarkably due to completely blocked I
_b-b
path, but FinFETs still have I
_b-b
path under the fin. Therefore, NSFETs with BOX and undoped PTS are the most suitable for sub 5-nm node heterogeneous 3D-IC, especially in analog applications.