A Novel Low-Energy CNTFET-Based Ternary Half-Adder Design using Unary Operators

Energy consumption is a critical factor to be reduced when designing embedded systems and IoT devices. By using Multiple-valued logic (MVL) circuits, interconnections complexity and energy consumption are decreased in comparison to binary systems. This paper uses MVL circuits to present a ternary half-adder (THA) with reduced energy consumption to maintain the battery usage in nano-scale embedded systems and IoT devices. The proposed CNTFET-based circuit uses a dualvoltage (Vdd and Vdd/2) and novel unary operators to improve the performance. Extensive HSPICE simulations show impressive improvements in reducing transistors count, decreasing energy consumption, increasing noise tolerance, and enhancing the robustness of process variations compared to previous circuits.