Design and Analysis of Improved Phase-Transition FinFET Utilizing Negative Capacitance

Phase transition FinFET (PT-FinFET) is an emerging steep slope device that utilizes phase transition material (PTM) at the source of the host FinFET to achieve steep switching and boost ${I}_{ \mathrm{\scriptscriptstyle ON}}/{I}_{ \mathrm{\scriptscriptstyle OFF}}$ ratio compared to conventional transistors. Due to nonzero $\rho _{\text {MET}}$ of the assisting PTM, PT-FinFET suffers from low ${I}_{ \mathrm{\scriptscriptstyle ON}}$ as compared to baseline FinFET. To address this issue, we propose, analyze, and mathematically justify a device design exhibiting enhanced subthreshold swing (SS), ${I}_{ \mathrm{\scriptscriptstyle ON}}$ and ${I}_{ \mathrm{\scriptscriptstyle OFF}}$ by exploiting a negative capacitance material at the gate of the PT-FinFET. In the proposed model, critical thickness ( ${t}_{\textit {fe}}$ ) of 3 nm for negative capacitance material was achieved. In comparison with the baseline FinFET and negative capacitance PT-FinFET, the proposed device (NC-PT-FinFET) is able to improve ${I}_{ \mathrm{\scriptscriptstyle ON}}/{I}_{ \mathrm{\scriptscriptstyle OFF}}$ ratio by 3.02 and 2.94 decades, respectively. Furthermore, SS of nearly 10 mV/decade is achieved over 4 decades of drain current with minimum value of 6.8 mV/decade for ${t}_{\textit {fe}}\,\,= {3}$ nm.