Implementation of AES Algorithm on FPGA and on software

AES (Advanced Encryption Standard) is an algorithm which is used to protect electronic data. The AES can be implemented in software as well as hardware. However implementing in Field Programmable Gate Array (FPGA) is much faster than implementing in software. In this project we have done a comparison between software implementation of AES algorithm and FPGA implementation of AES Algorithm. We have used XILINX Vivado 2017.4 software for coding the algorithm and simulating the same. We used Verilog as the HDL language for coding the AES algorithm. The algorithm was also implemented on ARTIX-7 FPGA.