Shared fuse macro for multiple embedded memory devices with redundancy

Customers designing increasingly complex integrated circuits are turning to ASIC vendors to help bring their products to market faster than their competitors. ASIC designs with large amounts of embedded memory must use fuse-enabled redundancy techniques to maintain price competitive yield. IBM has developed a data compression and shared fuse technique to accommodate large numbers of redundant elements in an ASIC. This technique minimizes or eliminates problems associated with a large number of fuses distributed within many embedded memories on an ASIC.