Design of Shape-Changeable Chiplet-Based Computers Using an Inductively Coupled Wireless Bus Interface

Research on small-sized microrobot swarms and shape-changeable user interfaces has been conducted extensively. Wireless bus interface technology has been proposed for such applications. This technology uses inductive coupling among on-chip coils to connect multiple chips wirelessly. However, wireless bus technology has a peculiar characteristic of broadcasting data only to the chips arranged adjacently, and it is challenging to apply existing network protocols. In addition, interference with processors and peripheral circuits on the same chip has not been thoroughly investigated. In this study, the network architecture of a shape-changeable computer system utilizing the wireless bus interface is presented. Moreover, we show the measurement results of the first multi-chip processor prototype, which utilizes the wireless bus interface. The implementation method of a processor core and the interface, and an interchip network protocol from the physical layer to the network layer are shown. A deadlock-free routing path can be formed in an irregular network among multiple chips by the proposed protocol that takes into account the characteristics of the physical layer of the wireless bus interface. The prototype chip, which has a RISC-V processor core, and the wireless bus interface fabricated in 0.18-μm CMOS technology validates that wireless data communication can be achieved between two processor chips.