Electrical test strategies for a wafer-level batch packaging technology

A wafer-level batch packaging (WLBP) technology is under development that provides compliant electrical leads with a density as high as 12,000 per cm/sup 2/. The leads are processed while the integrated circuits are still in wafer form through a series of relatively simple photolithographic steps. After electrical testing, the wafers are diced and the ICs are ready for direct assembly to an interconnect substrate. Sufficient lateral and vertical compliance is provided by the leads to accommodate the non-planarity encountered during assembly and thermal mismatch between the IC and substrate during normal operation. The high density of leads presents both challenges and opportunities for electrical testing. This paper summarizes the process technology used to fabricate these high-density electrical contacts. Several potential test strategies are introduced that may take advantage of these contacts.