Realization of Physical Unclonable Circuit IP Core on FPGA

Physical unclonable circuit (PUF) is a new type of encryption technology, which has the characteristics of unclonable, anti-tampering and unpredictable. This paper introduces the principle of arbiter PUF and proposes an adjustable arbiter PUF circuit to enhance the uniformity and reliability of PUF. Next, the process of implementing this circuit on the FPGA is shown, including how to use the look up table(lut) to implement the two logic gates, how to write the constraint file in Tcl script language, and how to manually place and route to achieve that two paths of the arbiter PUF are completely symmetrical.