Optimization Algorithm of Programmable Logic Matrice

Digital devices that differ in the degree of complexity of the tasks to be solved and its internal structure, however, are assembled from the simplest elements-logical automata without memory, called combinational logic devices. A convenient means of hardware implementation of such devices are programmable logic matrices. The logical matrices will be collected on resistors, diodes, transistor keys and the logic element NOT. The matrix elements are connected to each other in a certain way by jumpers. The conversion of a logical matrix to a particular logical device with the specified logical functions for output signals is performed by burning the jumpers. The programming logic depends on the matrix structure. However, an arbitrary combinational logic device can be implemented on a programmable logic matrix. As an optimality criterion for the optimization problem of electronic circuits of combinational logic devices on programmable logic matrices we should use the rank of the disjunctive normal form system for the outputs of this electronic circuit. The article offers algorithmic optimization tools for programmable logic matrices with no more than sixteen inputs (16-bit binary code is reserved as the input to the matrix). These means are developed on the basis of algorithms for minimizing disjunctive normal forms. A mathematical formulation of the optimization problem of finding the optimal programmable logic matrix is given. The operation of the proposed optimization algorithm is illustrated by an example.