A CNN Accelerator on FPGA using Binary Weight Networks

At present, convolutional neural networks have good performance while performing the object recognition tasks, but it relies on GPUs to solve a large number of complex operations. Therefore, the hardware accelerator of the neural network has become a central topic in the hardware researchers. This letter presents the design of an FPGA-based neural network accelerator implemented on the Xilinx Zynq-7020 FPGA. We use the binary LeNet model to achieve 91% accuracy in the MNIST dataset and use binary AlexNet model to achieve 67% accuracy in the CIFAR-10 dataset. Meanwhile the hardware resource is only about 10% usage on FPGA of the original design.