FPGA Design of Boolean Functions Using a Cascade of Decoders and Logic Gates

The paper presents active and interactive methods used for improving knowledge that students will get while implementing different Boolean functions with a cascade of full decoders and OR logic gates based on their schematic view and their testing on the laboratory board built with devices of Spartan-6 FPGA Family. The courses “Digital Electronics” and “Pulse and Digital Devices” introduce the students-bachelors of the electrical specialties in our University to the main problems of digital electronics.