A physical investigation of large-signal dynamic output capacitance and energy loss in GaN-on-Si power HEMTs at high-frequency applications

The origin of C_oss and the energy dissipation due to output capacitance can be roughly separated into two types: resistive loss and capacitive hysteresis loss. The resistive losses are due to the resistance of GaN buffer layers and Si-substrate. These loss components can be potentially improved by re-engineering the doping concentrations in the buffer stacks and substrate layer [1] [2]. However, the capacitive hysteresis loss that is suspected to be due to trapping dynamics remains largely unexplained. This paper presents a physics view of the trapping dynamics that is related to C_oss in the GaN HEMT under large-signal excitations. It is observed that under large-signal excitation, deeper traps in the buffer layers only account for a remnant portion of observed dynamic C_oss losses. Instead, traps with shallow energy levels (in the range of 0.5eV above valence band) are mostly responsible for the charge imbalance and energy dissipation. By identifying dominant types of traps and relevant trap energy levels in GaN HEMT, we can gain important insights on how to optimize the device stack design for high-frequency applications.